1. Field of the Invention
The present invention generally relates to a semiconductor device and a manufacturing method thereof and, more particularly, to a technology which can miniaturize and lighten a semiconductor device comprising a package structure, such as a BGA (Ball Grid Array) or a PGA (Pin Grid Array), and a heat radiation structure.
2. Description of the Related Art
Recently, as a semiconductor element (LSI chip) mounted on a package of a semiconductor device has been improved to present high performance, the semiconductor device is required to operate at high-speed. However, as the speed increases, more heat is produced during a circuit operation, causing an inconvenience of decreased reliability of the circuit operation.
As a countermeasure to this, a typical semiconductor device according to a conventional technology has a heat radiation structure to emit heat generated from the semiconductor chip to the exterior of the package. FIG. 1A to FIG. 1C show examples of a semiconductor device having this structure.
FIG. 1A is an illustration of a structure of a semiconductor device comprising: a plastic BGA (package) having an interconnection substrate formed of a resin (plastic) and a metal bump formed thereon as an external connection terminal; and a semiconductor chip, of not remarkably high performance and of a currently mass-produced type, mounted on the plastic BGA. FIG. 1B is an illustration of a structure of a semiconductor device comprising: a plastic BGA (package) having an interconnection substrate formed of a resin (plastic) and a metal bump formed thereon as an external connection terminal; and a semiconductor chip, faster and more power-consuming than the semiconductor chip shown in FIG. 1A, mounted on the plastic BGA. FIG. 1C is an illustration of a structure of a semiconductor device comprising: a plastic BGA (package) having an interconnection substrate formed of a resin (plastic) and a metal bump formed thereon as an external connection terminal; and a semiconductor chip, of even higher performance than the semiconductor chip shown in FIG. 1B, mounted on the plastic BGA.
In FIG. 1A, a semiconductor chip 2 is mounted on one surface of an interconnection substrate 1 so that a surface of the semiconductor chip 2 opposite to a side where an electrode terminal thereof is formed is bonded on the surface of the interconnection substrate 1. The electrode terminal of the semiconductor chip 2 is electrically connected to an interconnection pattern formed on the interconnection substrate 1 in a predetermined manner through a bonding wire 3. A sealing resin 4 covers and seals the semiconductor chip 2 and the bonding wire 3. On the other surface of the interconnection substrate 1 is formed a solder bump 5 which is used as an external connection terminal for the semiconductor chip 2. In addition, on the other surface of the interconnection substrate 1 is formed a solder bump 6 which is used as a terminal to radiate heat generated from the semiconductor chip 2. The heat radiation terminal (solder bump 6) penetrates through the interconnection substrate 1 and is thermally connected to the semiconductor chip 2. Likewise, though not particularly shown in the figure, the external connection terminal (solder bump 5) penetrates through the interconnection substrate 1 and is electrically connected to the interconnection pattern formed on the interconnection substrate 1.
With respect to the structure shown in FIG. 1A, the interconnection patterns can be formed on both surfaces of the interconnection substrate 1, providing a two-layer structure. However, such a two-layer structure is still insufficient for mounting thereon a semiconductor chip that requires a further high-speed operation.
As shown in FIG. 1B, to adapt to such a high-speed operation, an interconnection substrate 1a is constructed to have a four-layer structure which may achieve inhibition of a switching noise during a circuit operation in a semiconductor chip 2a; and a decrease in thermal resistance. This structure also has the heat radiation terminal (solder bump 6) as a heat radiation structure to radiate heat generated from the semiconductor chip 2a. 
As shown in FIG. 1C, to adapt to even higher performance, an interconnection substrate 1b is constructed to have a six-layer structure. A heat spreader 7, which is a highly thermally conductive metal plate, such as copper (Cu) or aluminum (Al), is bonded on the backside (the opposite surface to where an electrode terminal of a semiconductor chip 2b is formed) of the semiconductor chip 2b placed inside a cavity formed in a middle part of the interconnection substrate 1b so as to further reduce the thermal resistance. Still more, a heat sink 8 formed of a material such as a metal or a ceramic, is mounted on the heat spreader 7 so as to enhance heat radiation effect. The electrode terminal of the semiconductor chip 2b bonded to the heat spreader 7 is electrically connected to an interconnection pattern formed on each layer of the interconnection substrate 1b through a bonding wire 3a. A sealing resin 4a covers and seals the semiconductor chip 2b and the bonding wire 3a. 
The above-mentioned semiconductor devices according to the conventional technology have disadvantages. For example, in the structures shown in FIG. 1A and FIG. 1B, the heat generated from the semiconductor chip 2 or 2a is only radiated from the underside of the package (interconnection substrate 1 or interconnection substrate 1a) through a limited number of the heat radiation terminals (solder bumps 6). Thus, these structures are not sufficient in terms of heat radiation effect.
To solve this problem, the number of the heat radiation terminals 6 may be increased, as a countermeasure. However, since the package is constructed in a specified size, the increase in number of the heat radiation terminals 6 leads to a relative decrease in number of the external connection terminals (solder bumps 5), which poses more serious problems on the semiconductor device. Consequentially, the number of the heat radiation terminals 6 is limited, undermining this countermeasure.
On the other hand, in the structure shown in FIG. 1C, since the heat radiation structures (heat spreader 7 and heat sink 8) are thermally connected with the semiconductor chip 2b, the heat generated from the semiconductor chip 2b is effectively radiated from the upper side of the package (interconnection substrate 1b) through these heat radiation structures 7 and 8. The heat generated from the semiconductor chip 2b is also radiated from the underside of the package (interconnection substrate 1b) through the sealing resin 4a and the air between the sealing resin 4a and a mounting substrate, such as a motherboard (not shown in the figure). Therefore, this structure is advantageous in terms of the heat radiation effect, compared to the structures shown in FIG. 1A and FIG. 1B.
However, this structure shown in FIG. 1C also has a disadvantage. That is, since a metal plate, such as copper (Cu) or aluminum (Al), or a material such as a ceramic is used as the heat radiation structures (heat spreader 7 and heat sink 8), the whole package becomes relatively large and heavy. Especially when considering the recently increasing needs toward miniaturization and lightening of the semiconductor packages, this disadvantage still has to be improved.